Silicon on Insulator (chip techcnology)
This is the practice of placing a thin layer of silicon on top of an insulating material in order to speed up the performance of a microprocessor by reducing the capacitance of the transistors, and making them operate faster.
Silicon-On-Insulator; silicon substrate of choice in future generation CMOS ICs; basically a silicon wafer with a thin layer of oxide (SiO2) buried in it; devices are built into a layer of silicon on top of the buried oxide and are thus electricaly isolated from the substrate; SOI substrates provide superior isolation between adjacent devices in an IC; SOI devices have reduced parasitic capacitances. learn more.
silicon on insulator - isolant sur silicone - see SOI Special
Silicon on Insulator. Bei diesem Verfahren wird eine dünne Oxid-Schicht als Isolator unterhalb des eigentlichen Transistors eingeschoben. Damit kann eine vollständige dielektrische Isolation erreicht werden, was die Leckströme reduziert. Chips mit SOI benötigen daher weniger Energie als herkömmlich gefertigte.
Silicon on Insulator – historically the first commercially significant engineered substrate and now the most common, in which an insulating layer is placed between the front side active layer of silicon where the IC devices are fabricated, and the backside carrier silicon substrate. Applications range from military and space products up to ULSI signal processing ICs.
Silicon On Insulator. a substrate that has a layer of single crystal silicon on top of an insulating layer, on top of additional silicon. SOI is used to reduce stray capacitance for high-speed and or low-power CMOS and may also be used for high voltage applications.
see Silicon On Insulator.
Silicon-On-Insulator. A composite structure consisting of an active layer of silicon deposited on an insulating material. The insulator can be sapphire, silicon dioxide, silicon nitride, or even an insulating form of silicon itself.
Silicon on Insulator: A type of fabrication process where silicon is deposited on an insulating substrate. The process layers from top to bottom are: Semiconductor, insulator.
Silicon on Insulator. Usually achieved by bonding two wafers, one of which has oxide on top..
Silicon on Insulator. A fabrication technique that uses pure crystal silicon and silicon oxide. NVE has a patent relating to MRAM incorporating SOI materials. The invention could allow smaller MRAM cells and lower power consumption by reducing the electrical current required to write data to the memory cells.