Acronym for relatively placed macro. Xilinx specific. A group of device primitives to which RLOC= attributes have been applied, in order to constrain the placement of the group and thereby floorplan the group. For example, attributing with RLOC=R0C0, with RLOC=R0C0 and with RLOC=R0C1 constrains and to be placed in the same CLB/slice and to be placed in the adjacent slice in the next column. Wherever a, b, and may be placed in the device, they'll be placed together.