Complex Programmable Logic Device - 1/2ÆÂø¥i
a combination of a fully programmable AND/OR array and a bank of macrocells
Complex Programmable Logic Device (CPLD) is an erasable programmable logic device that can be programmed with a schematic or a behavioral design. CPLDs constitute a type of complex PLD based on EPROM or EEPROM technology. They are characterized by an architecture offering high speed, predictable timing, and simple software. The basic CPLD cell is called a macrocell, which is the CPLD implementation of a CLB. It is composed of AND gate arrays and is surrounded by the interconnect area. CPLDs consume more power than FPGA devices, are based on a different architecture, and are primarily used to support behavioral designs and to implement complex counters, complex state machines, arithmetic operations, wide inputs, and PAL crunchers.
omplex rogrammable ogic evice IC
Complex Programmable Logic Device. A device that contains a number of PLA or PAL functions sharing a common programmable interconnection matrix.
Complex Programmable Logic Device, synonymous with EPLD. PAL-derived programmable logic devices that implement logic as sum-of-products driving macrocells. CPLDs are known to have short pin-to-pin delays, and can accept wide inputs, but have relatively high power consumption and fewer flip-flops, compared to FPGAs.
A Complex Programmable Logic Device. Logic densities usually less than 10,000 gates.
CPLD stands for Complex Programmable Logic Device. It is a programmable logic device with complexity between that of PALs and FPGAs, and architectural features from both. The building block of a CPLD is the macro cell, which contains logic implementing disjunctive normal form expressions and more specialized logic operations.